CH32X035G8U6/0FN-28

RISC-V core 32-bit microcontroller -MCU

Product Description

          CH32X035 is an industrial-grade microcontroller designed based on the RISC-V core of Qingke. The CH32X035 is equipped with US8 and PD PHY, supports USB Host and USB Device functions, USB PD and type C fast charging functions, and has a built-in programmable protocol I/O controller. It provides rich peripheral resources such as 2 sets of OPA operational amplifiers, 3 sets of CMP voltage comparators, 4 sets of USART serial ports, I²C, SPI, multiple sets of timers, 12-bit ADC, and 14 channels of Touchkey.

Product features

      Core:

- Qingke 32-bit RISC-V4C core

- Supports the RV32IMAC instruction set and self-extending instructions

- Fast programmable interrupt controller + hardware interrupt stack

- Branch prediction, conflict handling mechanism

- Single-cycle multiplication, hardware division

       Memory:

- 20KB volatile Data Storage area SRAM

- 62KB program storage area CodeFlash

- 3328B System Boot program storage area BootLoader

- 256B system non-volatile configuration information storage area

- 256B user-defined information storage area

       Power management and low power consumption:

- System power supply V_DD rated voltage: 3.3V or 5V

- Low-power modes: Sleep, stop, standby

      System clock and reset:

- Built-in 48MHz clock oscillator

- Power on/off reset, programmable voltage monitor

      8-channel universal DMA controller:

- 8 channels, supporting circular buffer management

- Supports TIMx/ADC/USART/I²C/SPI

       Programmable Protocol I/O Controller PIOC:

- Programmable, supporting multiple single-wire interfaces and two-wire interfaces

      Two sets of operational amplifier OPA/PGA/voltage comparator:

- Multiple input channels, with selectable multiple gain Settings

- Each channel has 2 output channels, with an optional ADC pin

       Three groups of analog voltage comparators CMP：

- Each channel has 2 input channels, and a common reference voltage pin can be selected

- Output to I/O or trigger TIM2 directly internally

       12-bit analog-to-digital conversion ADC:

- Analog input range: GND to V_DD 

- 14 external signal channels + 1 internal signal channel

       Detection of 14 TouchKey channels

       Multiple sets of timers:

- 2 16-bit advanced timers, adding dead zone control and emergency braking, providing PWM complementary output for motor control

- 1 16-bit universal timer, providing input capture/output comparison /PWM

- 2 watchdog timers: independent and windowed

- System time base timer: 64-bit counter

       Four groups of USART serial ports: Supports LIN and IS07816

       One I²C interface: Supports SMBuS/PMBuS

       One SPI interface

       USB 2.0 Full-speed controller and PHY:

- Supports USB hosts or USB devices

       USB PD and Type C controller and PHY

       Fast GPIO port:

- 60 I/O ports, supporting 24 external interrupts

       Security feature: Unique ID for the chip

       Debugging mode: Serial 2-wire debugging interface SDI

Product function

        RISC-V4C supports the IMAC subset of the RISC-V instruction set. The processor is managed in a modular way internally, including units such as the Fast Programmable Interrupt Controller (PFIC), memory protection, branch prediction mode, and extended instruction support. Multiple sets of external buses are connected to external unit modules to achieve interaction between external functional modules and the kernel.

        The processor, with its features such as a minimalist instruction set, multiple working modes, and modular customization and expansion, can be flexibly applied in the design of microcontrollers for various scenarios, such as small-area and low-power embedded scenarios and high-performance application operating system scenarios.

        Support machine and user privilege modes

        Fast Programmable Interrupt Controller (PFIC)

        Multi-level hardware interrupt stack

        Serial 2-wire debugging interface

        Standard memory protection design

        Static or dynamic branch prediction, efficient jumping, and conflict detection mechanisms

        Custom extension instructions

Product specification

            The microcontroller is designed based on the RISC-V instruction set. In its architecture, components such as the Qingke microprocessor core, arbitration unit, DMA module, and SRAM storage interact through multiple sets of buses. The integration of a universal DMA controller reduces the burden on the CPU and improves access efficiency. The application of a multi-level clock management mechanism lowers the operating power consumption of peripheral devices. Meanwhile, it also features data protection mechanisms, automatic clock switching protection and other measures, which enhance system stability.

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