Original Genuine AT32F415CBT7 LQFP-48 ARM Cortex-M4 32-Bit Microcontroller -MCU
Original Genuine AT32F415CBT7 LQFP-48 ARM Cortex-M4 32-Bit Microcontroller -MCU
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¥3.80 CNY
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¥3.80 CNY
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AT32F415CBT7/LQFP-48
ARM Cortex-M4 32-bit microcontroller -MCU
Product details
Core :ARM® 32-bit Cortex® -M4CPU
- Maximum operating frequency of 150 MHZ, with a memory protection unit (MPU), built-in single-cycle multiplication and hardware division
- It has a DSP instruction set
Memory
- Flash program/data storage ranging from 64 K bytes to 256K bytes
- The 18K-byte system memory can be used as a Bootloader or configured as a general user program data area at one time
- 32 K bytes of SRAM
- sLib: Set the specified primary storage area as a safe storage area for execution code. Code in this area can only be called but not read
Clock, reset and power management
- 2.6 to 3.6 volts power supply and I/O pins
- Power-on/power-off reset (POR/PDR), Programmable Voltage monitor (PVD)
- 4 to 25 MHz oscillator
- It is equipped with a factory-calibrated 48 MHZRC oscillator (1% accuracy at 25°C and 2.5% accuracy from -40°C to +105°C), featuring an automatic clock calibration function (ACC)
- It is equipped with a 40 kHz RC oscillator with calibration
- A 32 kHz crystal oscillator with calibration function
Low power consumption
- Sleep, shutdown, and standby modes
- VBAT powers the ERTC and 20 32-bit backup registers
1 12-bit A/D converter, 0.5μs conversion time (up to 16 input channels)
- Conversion range :0 to 3.6V
- A set of sampling and holding functions
- Temperature sensor
Two comparators
DMA: 14-channel DMA controller
- Supported peripherals: Timer, ADC, SDIO, I²S, SPI, I²C, and USART
Debugging mode
- Serial Wire Debugging (SVVD) and JTAG interface
Up to 55 fast I/O ports
- 27/3955 multi-functional bidirectional I0 ports, all I/O ports can be mapped to 16 external interrupts: almost all I/O ports can tolerate 5V input signals
- All I/O ports are fast I/O, with the highest register access speed being fAHB /2
Up to 11 timers
- Up to 5 16-bit timers +2 32-bit timers, each timer with up to 4 channels and incremental encoder inputs for input capture/output comparison /PWM or pulse counting
- 1 16-bit PWM advanced control timer with dead zone control and emergency braking for motor control
- 2 watchdog timers (independent and windowed)
- System time timer: 24-bit self-decrement counter
ERTC: Enhanced RTC with sub-second accuracy and hardware calendar
Up to 12 communication interfaces
- 2 I²C interfaces (supporting SMBuS/PMBuS)
- Up to 5 USART interfaces (supporting ISO7816, LIN,IrDA interfaces and modulation and demodulation control)
- 2 SPI interfaces (50 M bits per second), both of which can be reused as I²S interfaces
- CAN interface (2.0B active), with built-in 256-byte dedicated SRAM
- USB 2.0 full-speed device/host /OTG controller, with 1280 bytes of dedicated SRAM built-in, supports Crystal-less in device mode
- SDIO interface
CRC calculation unit
The unique code of a 96-bit chip
Selection list
Flash memory | Model |
256 K bytes |
AT32F415RCT7.AT32F415RCT7-7 AT32F415CCT7.AT32F415CCU7. AT32F415KCU7-4 |
128 K bytes |
AT32F415RBT7.AT32F415RBT7-7 AT32F415CBT7.AT32F415CBU7. AT32F415KBU7-4 |
64 K bytes |
AT32F415R8T7.AT32F415R8T7-7 AT32F415C8T7.AT32F415K8U7-4 |
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